1. Field of the Invention
The present invention relates to a power supply circuit adapted for reducing a current consumption.
2. Description of the Related Art
In an integrated circuit (IC) designed for use in any apparatus such as a radio receiver where a battery is employed as a power source, it is requisite to sufficiently reduce a current consumption in the IC so as to prolong the service life of the battery.
In an attempt to meet the above requirement, there is contrived a circuit configuration of FIG. 6 which partially shows an intermediate frequency amplifier employed in an FM receiving circuit. In this diagram, a differential amplifier 1 is constituted of transistors Q1, Q2, a transistor Q0 as a constant current source, and resistors R1, R2; and another differential amplifier 2 is constituted of transistors Q3, Q4, resistors R1, R2 and resistors R3, R4.
An FM intermediate frequency signal is supplied from a preceding stage (not shown) to bases of the transistors Q1, Q2, and then the amplified outputs thereof are supplied from collectors of the transistors Q1, Q2 via capacitors C1, C2 to bases of the transistors Q3, Q4.
In this case, the signal current components included in the collector currents of the transistors Q1, Q2 are mutually opposite in phase, so that none of the signal current components from the transistors Q1, Q2 is delivered to the node of the resistors R1, R2 and the emitters of the transistors Q3, Q4. Therefore, as mentioned above, the transistors Q1, Q2 function as the differential amplifier 1 with the resistors R1, R2 serving as a load, while the transistors Q3, Q4 function as the differential amplifier 2 with the resistors R1, R2 as a constant current source.
Consequently, FM intermediate frequency signals amplified by the differential amplifiers 1, 2 are outputted from the collectors of the transistors Q3, Q4.
Thus, this circuit operates as a two-stage amplifier where the two differential amplifiers 1 and 2 are cascade-connected with respect to the alternating current, so that there is obtainable a two-stage gain. However, the current consumption is merely the value of one stage since, with respect to the direct current, the respective operating current lines of the differential amplifiers 1 and 2 are connected in series to the power source. According to this circuit, therefore, a two-stage gain can be realized with a one-stage current consumption to eventually achieve a reduction in the current consumption.
By applying the above idea to any device other than the differential amplifier, it becomes possible to operate two circuits with a one-circuit current consumption.
Low noise characteristic is a requisite in the first stage of a high frequency amplifier or the first stage of an FM intermediate frequency amplifier in an FM receiver. For the purpose of meeting such requirement, shot noise needs to be minimized by causing flow of a sufficiently great operating current of 100 .mu.A or so in the first-stage transistor.
However, in the circuit of FIG. 6 where the operating currents of the transistors Q1, Q2 and those of the transistors Q3, Q4 are equal to each other, it follows that, when great operating currents are caused to flow in the first-stage transistors Q1, Q2, great currents flow also in the transistors Q3, Q4. As a result, there occurs a considerable voltage drop in, e.g., the resistors R3, R4 to eventually bring about a problem that the supply voltage VCC is not settable to a low value.
Furthermore, since the operating currents of the transistors Q1, Q2 are equal to those of the transistors Q3, Q4, it signifies that if the operating currents of, e.g., the transistors Q1, Q2 are changed in design, the operating points of the transistors Q3, Q4 are varied to eventually induce the necessity of changing the design with regard to the transistors Q3, Q4 as well.
Thus, it becomes necessary to set the operating currents in consideration of the operations of both the differential amplifiers 1 and 2. In an arrangement where the circuits are connected, instead of the differential amplifiers 1 and 2 in series to a power source, if the optimal operating currents are mutually different in the upper and lower circuits, one of such circuits fails to perform its best operation.
Further in the circuit configuration of FIG. 6, if there exists any imbalance between the transistors Q1 and Q2 or between the resistors R1 and R2 due to some variations in the manufacture of the IC, or between the signals supplied from the preceding stage to the transistors Q1 and Q2 respectively, then the signal current components included in the collector currents of the transistors Q1, Q2 are rendered mutually different.
And when any difference is existent between the signal current components included in the collector currents of the transistors Q1, Q2, a signal voltage component appears at the node of the resistors R1, R2 and the emitters of the transistors Q3, Q4. Therefore, in case the transistors Q1, Q2 are on the input side and the transistors Q3, Q4 are on the output side as shown in FIG. 6, the operation of the entire circuit may be rendered unstable. And the degree of freedom in designing the circuit is lowered if the configuration is modified to avert such operational instability.